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 STQ2HNK60ZR-AP STF2HNK60Z - STD2HNK60Z-1
N-CHANNEL 600V - 4.4 - 2.0A TO-92/TO-220FP/IPAK Zener-Protected SuperMESHTM MOSFET
TYPE STQ2HNK60ZR-AP STD2HNK60Z-1 STF2HNK60Z VDSS 600 V 600 V 600 V RDS(on) < 4.8 < 4.8 < 4.8 ID 0.5 A 2.0 A 2.0 A PW 3W 45 W 20 W
3 1 2
TYPICAL RDS(on) = 4.4 EXTREMELY HIGH dv/dt CAPABILITY ESD IMPROVED CAPABILITY 100% AVALANCHE TESTED NEW HIGH VOLTAGE BENCHMARK GATE CHARGE MINIMIZED
TO-92 (Ammopack)
TO-220FP
3 2 1
IPAK DESCRIPTION The SuperMESHTM series is obtained through an extreme optimization of ST's well established stripbased PowerMESHTM layout. In addition to pushing on-resistance significantly down, special care is taken to ensure a very good dv/dt capability for the most demanding applications. Such series complements ST full range of high voltage MOSFETs including revolutionary MDmeshTM products. INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS AC ADAPTORS AND BATTERY CHARGERS SWITH MODE POWER SUPPLIES (SMPS)
ORDER CODES
PART NUMBER STD2HNK60Z-1 STQ2HNK60ZR-AP STF2HNK60Z MARKING D2HNK60Z Q2HNK60ZR F2HNK60Z PACKAGE IPAK TO-92 TO-220FP PACKAGING TUBE AMMOPAK TUBE
April 2004
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ABSOLUTE MAXIMUM RATINGS
Symbol VDS VDGR VGS ID ID IDM ( ) PTOT VESD(G-S) dv/dt (1) VISO Tj Tstg Parameter IPAK Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 k) Gate- source Voltage Drain Current (continuous) at TC = 25C Drain Current (continuous) at TC = 100C Drain Current (pulsed) Total Dissipation at TC = 25C Derating Factor Gate source ESD(HBM-C=100pF, R=1.5K) Peak Diode Recovery voltage slope Insulation Withstand Voltage (DC) Operating Junction Temperature Storage Temperature -2.0 1.26 8 45 0.36 Value TO-220FP 600 600 30 2.0 (*) 1.26 (*) 8 (*) 20 0.16 2000 4.5 2500 -55 to 150 -0.5 0.32 2 3 0.025 TO-92 V V V A A A W W/C V V/ns V C Unit
( ) Pulse width limited by safe operating area (1) ISD 2 A, di/dt 200 A/s, VDD V(BR)DSS, Tj TJMAX. (*) Current Limited by package
THERMAL DATA
IPAK Rthj-case Rthj-amb Rthj-lead Tl Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Thermal Resistance Junction-lead Max Maximum Lead Temperature For Soldering Purpose 2.77 100 -300 TO-220FP 6.25 62.5 -300 TO-92 -120 40 260 C/W C/W C/W C
AVALANCHE CHARACTERISTICS
Symbol IAR EAS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Single Pulse Avalanche Energy (starting Tj = 25 C, ID = IAR, VDD = 50 V) Max Value 2 120 Unit A mJ
GATE-SOURCE ZENER DIODE
Symbol BVGSO Parameter Gate-Source Breakdown Voltage Test Conditions Igs= 1mA (Open Drain) Min. 30 Typ. Max. Unit V
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device's ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device's integrity. These integrated Zener diodes thus avoid the usage of external components.
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ELECTRICAL CHARACTERISTICS (TCASE =25C UNLESS OTHERWISE SPECIFIED) ON/OFF
Symbol V(BR)DSS IDSS IGSS VGS(th) RDS(on) Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Gate Threshold Voltage Static Drain-source On Resistance Test Conditions ID = 1 mA, VGS = 0 VDS = Max Rating VDS = Max Rating, TC = 125 C VGS = 20V VDS = VGS, ID = 50 A VGS = 10V, ID = 1.0 A 3 3.75 4.4 Min. 600 1 50 10 4.5 4.8 Typ. Max. Unit V A A A V
DYNAMIC
Symbol gfs (1) Ciss Coss Crss Coss eq. (3) td(on) tr td(off) tf Qg Qgs Qgd Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Equivalent Output Capacitance Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions VDS = 15 V, ID = 1.0 A VDS = 25V, f = 1 MHz, VGS = 0 Min. Typ. 1.5 280 38 7 30 10 30 23 50 11 2.25 6 15 Max. Unit S pF pF pF pF ns ns ns ns nC nC nC
VGS = 0V, VDS = 0V to 480V VDD = 300 V, ID = 1.0 A RG = 4.7 VGS = 10 V (Resistive Load see, Figure 3) VDD = 480V, ID = 2.0 A, VGS = 10V
SOURCE DRAIN DIODE
Symbol ISD ISDM (2) VSD (1) trr Qrr IRRM trr Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 2.0 A, VGS = 0 ISD = 2.0 A, di/dt = 100 A/s VDD = 20 V, Tj = 25C (see test circuit, Figure 5) ISD = 13 A, di/dt = 100 A/s VDD = 20 V, Tj = 150C (see test circuit, Figure 5) 178 445 5 200 500 5 Test Conditions Min. Typ. Max. 2.0 8.0 1.6 Unit A A V ns nC A ns nC A
Note: 1. Pulsed: Pulse duration = 300 s, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. 3. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS.
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Safe Operating Area for TO-92 Thermal Impedance for TO-92
Safe Operating Area for TO-220FP
Thermal Impedance for TO-220FP
Safe Operating Area for IPAK
Thermal Impedance for IPAK
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STQ2HNK60ZR-AP - STF2HNK60Z - STD2HNK60Z-1
Output Characteristics Transfer Characteristics
Transconductance
Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage
Capacitance Variations
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Normalized Gate Thereshold Voltage vs Temp. Normalized On Resistance vs Temperature
Source-drain Diode Forward Characteristics
Normalized BVDSS vs Temperature
Maximum Avalanche Energy vs Temperature
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STQ2HNK60ZR-AP - STF2HNK60Z - STD2HNK60Z-1
Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuit For Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times
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STQ2HNK60ZR-AP - STF2HNK60Z - STD2HNK60Z-1
TO-92 MECHANICAL DATA
mm. DIM. MIN. A b D E e e1 L R S1 W V 4.32 0.36 4.45 3.30 2.41 1.14 12.70 2.16 0.92 0.41 5 TYP MAX. 4.95 0.51 4.95 3.94 2.67 1.40 15.49 2.41 1.52 0.56 MIN. 0.170 0.014 0.175 0.130 0.094 0.044 0.50 0.085 0.036 0.016 5 TYP. MAX. 0.194 0.020 0.194 0.155 0.105 0.055 0.610 0.094 0.060 0.022 inch
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TO-92 AMMOPACK
mm. MIN. 4.45 3.30 TYP MAX. 4.95 3.94 1.6 2.3 0.41 12.5 5.65 2.44 -2 17.5 5.7 8.5 18.5 15.5 3.8 16 4 18 6 9 12.7 6.35 2.54 0.56 12.9 7.05 2.94 2 19 6.3 9.25 0.5 20.5 16.5 25 4.2 0.9 11 3 -1 1 0.11 -0.04 0.04 0.15 0.157 0.72 0.61 0.63 0.016 0.49 0.22 0.09 -0.08 0.69 0.22 0.33 0.71 0.23 0.35 0.5 0.25 0.1 MIN. 0.170 0.130 inch TYP. MAX. 0.194 0.155 0.06 0.09 0.022 0.51 0.27 0.11 0.08 0.74 0.24 0.36 0.02 0.80 0.65 0.98 0.16 0.035 0.43
DIM. A1 T T1 T2 d P0 P2 F1, F2 delta H W W0 W1 W2 H H0 H1 D0 t L l1 delta P
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TO-220FP MECHANICAL DATA
mm. MIN. 4.4 2.5 2.5 0.45 0.75 1.15 1.15 4.95 2.4 10 16 28.6 9.8 2.9 15.9 9 3 30.6 10.6 3.6 16.4 9.3 3.2 1.126 .0385 0.114 0.626 0.354 0.118 TYP MAX. 4.6 2.7 2.75 0.7 1 1.7 1.7 5.2 2.7 10.4 MIN. 0.173 0.098 0.098 0.017 0.030 0.045 0.045 0.195 0.094 0.393 0.630 1.204 0.417 0.141 0.645 0.366 0.126 inch TYP. MAX. 0.181 0.106 0.108 0.027 0.039 0.067 0.067 0.204 0.106 0.409
DIM. A B D E F F1 F2 G G1 H L2 L3 L4 L5 L6 L7 O
A
B
L3 L6 L7
F1
D
F
G1 H
F2
L2 L5
E
123
L4
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G
STQ2HNK60ZR-AP - STF2HNK60Z - STD2HNK60Z-1
TO-251 (IPAK) MECHANICAL DATA
DIM. MIN. A A1 A3 B B2 B3 B5 B6 C C2 D E G H L L1 L2 0.45 0.48 6 6.4 4.4 15.9 9 0.8 0.8 0.3 0.95 0.6 0.6 6.2 6.6 4.6 16.3 9.4 1.2 1 0.017 0.019 0.236 0.252 0.173 0.626 0.354 0.031 0.031 2.2 0.9 0.7 0.64 5.2 mm TYP. MAX. 2.4 1.1 1.3 0.9 5.4 0.85 0.012 0.037 0.023 0.023 0.244 0.260 0.181 0.641 0.370 0.047 0.039 MIN. 0.086 0.035 0.027 0.025 0.204 inch TYP. MAX. 0.094 0.043 0.051 0.031 0.212 0.033
H
A
C C2
L2 D
B3
B6
A1
L
=
=
3
B5
B
A3
=
B2
=
G
=
E
L1
1
2
=
0068771-E
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STQ2HNK60ZR-AP - STF2HNK60Z - STD2HNK60Z-1
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners (c) 2004 STMicroelectronics - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. http://www.st.com
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